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 MTD6N15 Power Field Effect Transistor DPAK for Surface Mount
N-Channel Enhancement-Mode Silicon Gate
This TMOS Power FET is designed for high speed, low loss power switching applications such as switching regulators, converters, solenoid and relay drivers. * Silicon Gate for Fast Switching Speeds * Low RDS(on) -- 0.3 Max * Rugged -- SOA is Power Dissipation Limited * Source-to-Drain Diode Characterized for Use With Inductive Loads * Low Drive Requirement -- VGS(th) = 4.0 V Max * Surface Mount Package on 16 mm Tape
MAXIMUM RATINGS
Rating Drain-Source Voltage Drain-Gate Voltage (RGS = 1.0 M) Gate-Source Voltage -- Continuous Gate-Source Voltage -- Non-Repetitive (tp 50 s) Drain Current -- Continuous Drain Current -- Pulsed Total Power Dissipation @ TC = 25C Derate above 25C Total Power Dissipation @ TA = 25C Derate above 25C (Note 1) Total Power Dissipation @ TA = 25C (1) Derate above 25C (Note 2) Operating and Storage Junction Temperature Range Symbol VDSS VDGR VGS VGSM ID IDM PD PD PD TJ, Tstg Value 150 150 20 40 6.0 20 20 0.16 1.25 0.01 1.75 0.014 -65 to +150 Unit Vdc Vdc Vdc Vpk Adc Watts W/C Watts W/C Watts W/C C 1 Gate 6N15 Y WW CASE 369C DPAK (Surface Mount) STYLE 2 12 3 1 3 CASE 369D DPAK (Straight Lead) STYLE 2 2 V(BR)DSS 150 V
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RDS(on) MAX 0.3 W N-CHANNEL D ID MAX 6.0 A
G S 4 4
MARKING DIAGRAM & PIN ASSIGNMENTS
4 Drain YWW T 6N15 4 Drain YWW T 6N15 3 Source 1 Gate 2 Drain 3 Source Package DPAK DPAK Straight Lead DPAK Shipping 75 Units/Rail 75 Units/Rail 2500 Tape & Reel Publication Order Number: MTD6N15/D
2 Drain
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance - Junction to Case - Junction to Ambient (Note 1) - Junction to Ambient (Note 2) Symbol RJC RJA RJA Value 6.25 100 71.4 Unit C/W
= Device Code = Year = Work Week
ORDERING INFORMATION
Device MTD6N15 MTD6N15-1 MTD6N15T4
1. When surface mounted to an FR4 board using the minimum recommended pad size. 2. When surface mounted to an FR4 board using 0.5 sq. in. drain pad size.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2004
1
March, 2004 - Rev. 2
MTD6N15
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain-Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Zero Gate Voltage Drain Current (VDS = Rated VDSS, VGS = 0 Vdc) TJ = 125C Gate-Body Leakage Current, Forward (VGSF = 20 Vdc, VDS = 0) Gate-Body Leakage Current, Reverse (VGSR = 20 Vdc, VDS = 0) ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (VDS = VGS, ID = 1.0 mAdc) TJ = 100C Static Drain-Source On-Resistance (VGS = 10 Vdc, ID = 3.0 Adc) Drain-Source On-Voltage (VGS = 10 Vdc) (ID = 6.0 Adc) (ID = 3.0 Adc, TJ = 100C) Forward Transconductance (VDS = 15 Vdc, ID = 3.0 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS* (TJ = 100C) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge SOURCE-DRAIN DIODE CHARACTERISTICS* Forward On-Voltage Forward Turn-On Time Reverse Recovery Time 3. Pulse Test: Pulse Width 300 s, Duty Cycle 2%. 2.5 PD, POWER DISSIPATION (WATTS) 25 (IS = 6.0 Adc, di/dt = 25 A/s 6 0 Ad A/ VGS = 0 Vdc,) VSD ton trr 1.3 (Typ) 2.0 Vdc (VDS = 0.8 Rated VDSS, ) ID = Rated ID, VGS = 10 Vdc) See Fi S Figure 12 (VDD = 25 Vdc, ID = 3.0 Adc, RG = 50 ) See Figures 13 and 14 td(on) tr td(off) tf Qg Qgs Qgd -- -- -- -- 15 (Typ) 8.0 (Typ) 7.0 (Typ) 50 180 200 100 30 -- -- nC ns (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) ) See Figure 11 S Fi Ciss Coss Crss -- -- -- 1200 500 120 pF VGS(th) RDS(on) VDS(on) -- -- gFS 2.5 1.8 1.5 -- mhos 2.0 1.5 -- 4.5 4.0 0.3 Vdc Ohm Vdc V(BR)DSS IDSS -- -- IGSSF IGSSR -- -- 10 100 100 100 nAdc nAdc 150 -- Vdc Adc Symbol Min Max Unit
Limited by stray inductance 325 (Typ) -- ns
2
20 TC
1.5
15
1
10
0.5
5
0 TA
0 TC
25
50
75
100
125
150
T, TEMPERATURE (C)
Figure 1. Power Derating http://onsemi.com
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MTD6N15
TYPICAL ELECTRICAL CHARACTERISTICS
VGS(th) , GATE THRESHOLD VOLTAGE (VOLTS) 24 10 V I D , DRAIN CURRENT (AMPS) 20 16 8V 12 8 4 0 7V 6V 5V 0 10 20 30 40 50 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 60 9V TJ = 25C 3.6 VDS = VGS ID = 1 mA
3.2
2.8
2.4
2
- 50
0 50 100 TJ, JUNCTION TEMPERATURE (C)
150
Figure 2. On-Region Characteristics
V(BR)DSS , DRAIN-TO-SOURCE BREAKDOWN VOLTAGE (NORMALIZED)
Figure 3. Gate-Threshold Voltage Variation With Temperature
14 VDS = 10 V I D , DRAIN CURRENT (AMPS) 12 10 8 6 4 2 0 100C - 55C
TJ = 25C
2 VGS = 0 V ID = 0.25 mA
1.6
1.2
0.8
0.4
4 6 8 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
10
0 - 50
0
50 100 150 TJ, JUNCTION TEMPERATURE (C)
200
Figure 4. Transfer Characteristics
Figure 5. Breakdown Voltage Variation With Temperature
R DS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS)
VGS = 10 V 0.25 0.20 0.15 0.10 0.05 0
RDS(on) , DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
0.30 TJ = 100C
2 VGS = 10 V ID = 3 A
1.6
25C
1.2
- 55C
0.8
0.4
0
4
8 12 16 ID, DRAIN CURRENT (AMPS)
20
0 - 50
0
50 100 150 TJ, JUNCTION TEMPERATURE (C)
200
Figure 6. On-Resistance versus Drain Current
Figure 7. On-Resistance Variation With Temperature
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3
MTD6N15
SAFE OPERATING AREA
20 I D , DRAIN CURRENT (AMPS) 10 5 2 1 0.5 0.2 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT TC = 25C VGS = 20 V SINGLE PULSE 10 ms 1 ms 20 100 s 10 s I D , DRAIN CURRENT (AMPS) 15
10
TJ 150C
dc
5
0.05 0.03 0.3 0.5 0.7 1 2 3 5 7 10 20 30 50 70 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
200 300
0
0
20
40 60 80 100 120 140 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
160
Figure 8. Maximum Rated Forward Biased Safe Operating Area
Figure 9. Maximum Rated Switching Safe Operating Area SWITCHING SAFE OPERATING AREA
FORWARD BIASED SAFE OPERATING AREA
The FBSOA curves define the maximum drain-to-source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on a case temperature of 25C and a maximum junction temperature of 150C. Limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. Motorola Application Note, AN569, "Transient Thermal Resistance-General Data and Its Use" provides detailed instructions.
The switching safe operating area (SOA) of Figure 9 is the boundary that the load line may traverse without incurring damage to the MOSFET. The fundamental limits are the peak current, IDM and the breakdown voltage, V(BR)DSS. The switching SOA shown in Figure 8 is applicable for both turn-on and turn-off of the devices for switching times less than one microsecond. The power averaged over a complete switching cycle must be less than:
TJ(max) - TC RJC
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED)
0.7 0.5 0.3 0.2
D = 0.5 0.2 0.1
0.1 0.05 0.07 0.02 0.05 0.03 0.02 0.01 0.01 0.01 SINGLE PULSE
P(pk)
t1 t2 DUTY CYCLE, D = t1/t2 0.1 0.2 0.3 0.5 1 23 5 10 t, TIME OR PULSE WIDTH (ms) 20
RJC(t) = r(t) RJC RJC(t) = 6.25C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t) 50 100 200 500 1000
0.02 0.03
0.05
Figure 10. Thermal Response
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4
MTD6N15
2000 VGS, GATE SOURCE VOLTAGE (VOLTS) 1600 C, CAPACITANCE (pF) TJ = 25C VGS = 0 16 TJ = 25C ID = 6 A 12 75 V 8 VDS = 50 V 120 V
1200
800 VDS = 0 Ciss Coss Crss 25 30
400
4
0 15
10
5 0 VGS
5 VDS
10
15
20
35
0
0
4
8 12 Qg, TOTAL GATE CHARGE (nC)
16
20
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 11. Capacitance Variation
Figure 12. Gate Charge versus Gate-To-Source Voltage
RESISTIVE SWITCHING
VDD ton RL Vout Vin PULSE GENERATOR Rgen 50 z = 50 50 INPUT, Vin 50% 10% PULSE WIDTH DUT td(on) OUTPUT, Vout INVERTED 10% 90% 50% tr 90% td(off) toff tf 90%
Figure 13. Switching Test Circuit
Figure 14. Switching Waveforms
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MTD6N15
PACKAGE DIMENSIONS
DPAK CASE 369C-01 ISSUE O
-T- B V R
4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 --- 0.89 1.27 3.93 ---
C E
DIM A B C D E F G H J K L R S U V Z
A S
1 2 3
Z U
K F L D G
2 PL
J H 0.13 (0.005) T
M
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
SOLDERING FOOTPRINT*
6.20 0.244 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 3.0 0.118
SCALE 3:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MTD6N15
PACKAGE DIMENSIONS
DPAK CASE 369D-01 ISSUE O
B V R
4
C E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 ---
Z A
3
S -T-
SEATING PLANE
1
2
K
F D G
3 PL
J H 0.13 (0.005)
M
DIM A B C D E F G H J K R S V Z
T
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
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MTD6N15
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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8
MTD6N15/D


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